Koen De Bosschere Knihy

How can nations improve their chances of winning medals in international sport? This book deals with the strategic policy planning process that underpins the development of successful national elite sport development systems. Drawing on various international competitiveness studies, it examines how nations develop and implement policies that are based on the critical success factors that may lead to competitive advantage in world sport. An international group of researchers joined forces to develop theories, methods and a model on the Sports Policy factors Leading to International Sporting Success (SPLISS). The book presents the results of the large-scale international SPLISS-project. In this project the research team identified, compared and contrasted elite sport policies and strategies in place for the Olympic Games and other events in 15 distinct nations. With input from 58 researchers and 33 policy makers worldwide and the views of over 3,000 elite athletes, 1,300 high performance coaches and 240 performance directors, this work is the largest benchmarking study of national elite sport policies ever conducted. The nations taking part in SPLISS are: • Americas: Brazil and Canada • Asia: Japan and South Korea • Europe: Belgium (Flanders & Wallonia), Denmark, Estonia, Finland, France, the Netherlands, Northern Ireland, Portugal, Spain, Switzerland • Oceania: Australia

Inhaltsverzeichnis Invited Program. Keynote: Insight, Not (Random) Numbers: An Embedded Perspective. I Secure and Low-Power Embedded Memory Systems. Compiler-Assisted Memory Encryption for Embedded Processors. Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems. Applying Decay to Reduce Dynamic Power in Set-Associative Caches. II Architecture/Compiler Optimizations for Efficient Embedded Processing. Virtual Registers: Reducing Register Pressure Without Enlarging the Register File. Bounds Checking with Taint-Based Analysis. Reducing Exit Stub Memory Consumption in Code Caches. III Adaptive Microarchitectures. Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling. Fetch Gating Control Through Speculative Instruction Window Weighting. Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. Branch History Matching: Branch Predictor Warmup for Sampled Simulation. Sunflower: Full-System, Embedded Microarchitecture Evaluation. Efficient Program Power Behavior Characterization. Generation of Efficient Embedded Applications. Performance/Energy Optimization of DSP Transforms on the XScale Processor. Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms. A Throughput-Driven Task Creation and Mapping for Network Processors. Optimizations and Architectural Tradeoffs for Embedded Systems. MiDataSets: Creating the Conditions for a Mo