VLSI CHIP DESIGN USING HIGH SPEED ATM SWITCH

Viac o knihe

The book focuses on the design of a solitary chip Asynchronous Transfer Mode (ATM) switch utilizing Very Large Scale Integration (VLSI) technology. It explores various buffering techniques to address conflict issues in ATM switching and presents a VHDL model to validate functionality. An 8x8 switch design is detailed, employing a 0.5 m CMOS VLSI process, achieving a peak throughput of 200 Mbps per output port. The text emphasizes the importance of managing network traffic and resource allocation for diverse applications, ensuring quality of service (QoS) for users.